Responsibilities
Verilog RTL design in order to integrate different IPs together such as PCIe IP with vendor PHY module Verifying the IP integration with dedicated simulation environment Development and support test cases of different verification environments Support worldwide customers on the IP integration Get familiar to existing verification process, propose improvements Maintain the traceability from the customer specification or the product specification to the architecture and verification results. Track and maintain verification productivity metrics Reporting periodically on progress and difficulties Qualifications
Positive and self-driven achiever with:
Can Do Attitude Bachelor or Master's degree in Electronics Engineering, Computer Science, or related disciplines Strong analytical and problem-solving skills E...