About the Role
Job Title: DFT Engineer
Experience Level: 2+ years
Location: Hyderabad and Banglaore
Job Description:
Key Responsibilities:
- Develop and implement DFT architecture and methodologies for ASIC/SoC designs.
- Insert and verify scan chains (scan insertion, ATPG, scan stitching).
- Implement MBIST/Logic BIST using industry-standard tools and flows.
- Work on boundary scan (IEEE 1149.1), JTAG implementation and validation.
- Create and validate test patterns (ATPG) for stuck-at, transition faults, and path delay faults.
- Work with RTL, synthesis, and physical design teams to ensure DFT compliance.
- Perform fault simulations, coverage analysis, and debug test pattern issues.
- Support silicon bring-up, ATE test development, and yield enhancement.
- Deliver final test models and documentation for production testing.
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