Silicon Reliability Engineering Lead

Location: Bengaluru, India Experience: 10–15 years Industry: Semiconductors | AI | Networking | ASIC Design

Role Overview

As the Physical Design EM/IR/ESD Lead you will be the ultimate guardian of our

silicon reliability and power integrity. In the high-stakes world of AI SOCs, power delivery is the

heartbeat of the chip. You will hold end-to-end ownership of the EM/IR and ESD strategy,

bridging the gap between ambitious architectural power demands and robust, manufacturable

physical implementation. This is a leadership role designed for an expert who thrives on defining

methodologies from scratch and ensuring first-pass silicon success.

Key Responsibilities

Methodology & Flow Development

● Define & Own EM/IR/ESD Flow: Design, develop, and maintain a robust, automated,

and scalable physical design flow for Electromigration (EM), Static/Dynamic IR-Drop (IR),

and ESD analysis.

● PDN...