About the Role
Terminus Circuits is a focused mixed-signal and high-speed interface IP development company delivering cutting‑edge Ser Des and PHY solutions for datacenters, communication chips, AI, and consumer markets. We are scaling rapidly and driving multiple tapeouts in advanced Fin FET nodes.
We are seeking several experienced Ser Des Designers to join our team. The incumbent will participate in at least two tapeouts this year in Fin FET process nodes, supporting 10+ unique IPs and several protocol-based high‑speed serial-link products. You will contribute to architecture, circuit design, verification, Tape out, silicon bring-up, and cross-functional integration.
Key Responsibilities
Design/improvise analog/mixed‑signal Ser Des blocks (PLL, CDR, TX/RX front‑end, CTLE, DFE, equalizers, serializers/deserializers).
Produce circuit-level designs, schematic capture, and transistor-level Spectre simulations.
Define and document block and system-level specifications for multiple IPs an...
We are seeking several experienced Ser Des Designers to join our team. The incumbent will participate in at least two tapeouts this year in Fin FET process nodes, supporting 10+ unique IPs and several protocol-based high‑speed serial-link products. You will contribute to architecture, circuit design, verification, Tape out, silicon bring-up, and cross-functional integration.
Key Responsibilities
Design/improvise analog/mixed‑signal Ser Des blocks (PLL, CDR, TX/RX front‑end, CTLE, DFE, equalizers, serializers/deserializers).
Produce circuit-level designs, schematic capture, and transistor-level Spectre simulations.
Define and document block and system-level specifications for multiple IPs an...
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