Full-time
Senior Verification Engineer: DDR/HBM IP for AI Systems
Posted by Synopsys, Inc. • moreira, porto, Portugal
About the Role
Synopsys, Inc. is seeking a verification engineer to work on memory interface IP for AI and high-performance computing systems in Porto. The ideal candidate will have over 5 years of experience in mixed-signal design and deep expertise in SystemVerilog and UVM methodology.
Your role will include writing test plans, building complex testbenches, and mentoring junior engineers. We offer comprehensive health and wellness benefits, along with a collaborative team environment.
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