Senior Verification Engineer

Bachelor’s degree in computer science or electrical/Electronics Engineering

● Over 10 years of experience in Design Verification

● Strong understanding of design concepts and ASIC verification flow

● Proven experience in IP, Subsystem, and SoC verification

● Hands-on expertise with high-speed protocols and their controllers (PCIe/USB/DDR/

Ethernet/MIPI/UFS)

● Proficient in System Verilog and UVM coding

● Solid understanding of RAL (Register Abstraction Layer)

● Practical experience integrating third-party VIPs

● Excellent problem-solving, analytical, and debugging skills

● Mandatory exposure to at least one of the following: GLS, UPF, Performance

Verification, Meta stability simulation, Boot-up (C–SV/UVM) handshakes and C

testcase development

● Demonstrated capability in Subsystem testbench development and SoC-level

verification

● Strong knowledge of AMBA protocols including AXI, APB, and AHB