Senior Silicon Validation Engineer

Role Overview We are seeking Senior Design Engineer specializing in Network-on-Chip (NoC) to join our cutting-edge semiconductor team. This role involves architecting, designing, and optimizing NoC interconnect solutions for high-performance chips. You will work closely with architects, verification engineers, and software teams to deliver scalable, efficient, and low-latency interconnect designs. Job Description:

• NoC Architecture/Micro-architect & Design: Develop and optimize high-performance, scalable, and low-latency NoC solutions for SoCs and multi-core processors.
• Performance Analysis: Conduct traffic modeling, simulation, and bottleneck analysis to optimize NoC throughput and latency.
• Verification & Validation: Collaborate with verification teams to develop testbenches, ensure functional correctness, and debug issues.
• Power & Area Optimization: Optimize NoC designs for low-power and area-efficient implementations, working closely with ...