About the Role
Senior RTL Design Engineer
Experience : 5+years
Location : Hyderabad
Silicon Design Engineer
Must have : RTL design experience along with Ethernet domain expertise.
• Candidate should be with strong RTL design experience.
• Strong design knowledge on Ethernet IPs or Ethernet protocol domain.
• Good knowledge in Verilog/VHDL languages.
• Knowledge in any of the scripting languages TCL/Perl/python is a plus.
• Good Knowledge of AXI Protocols.
• Good communication skills and experience working with different teams.
• Experience on FPGA methodology/technology is a plus.
Interested,please share your updated resume to
Experience : 5+years
Location : Hyderabad
Silicon Design Engineer
Must have : RTL design experience along with Ethernet domain expertise.
• Candidate should be with strong RTL design experience.
• Strong design knowledge on Ethernet IPs or Ethernet protocol domain.
• Good knowledge in Verilog/VHDL languages.
• Knowledge in any of the scripting languages TCL/Perl/python is a plus.
• Good Knowledge of AXI Protocols.
• Good communication skills and experience working with different teams.
• Experience on FPGA methodology/technology is a plus.
Interested,please share your updated resume to
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