Full-time
Senior Memory Layout Engineer - Design & Optimization
Posted by Micron Technology • jalisco, jalisco, Mexico
About the Role
A technology leader in memory solutions located in Mexico, Jalisco, is seeking an innovative engineer to contribute to the design and optimization of Memory/Logic/Analog circuits. The ideal candidate will manage the layout process, perform verification processes, and collaborate across engineering teams to ensure manufacturability. This role requires a proactive approach to driving innovation in future Memory generations in a dynamic work environment. #J-18808-Ljbffr
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