Senior FPGA - RTL Design Engineer

We are seeking an experienced Senior FPGA/RTL Design Engineer with strong technical expertise in RTL design, VHDL, Verilog, Java, C, and hands‑on experience with FPGA devices and tools. The ideal candidate will design, develop, verify, and optimize digital hardware architectures for high-performance embedded and hardware systems.

Key Responsibilities:

FPGA / RTL Design

• Design, and implement RTL modules using VHDL and Verilog.
• Develop FPGA-based solutions using Altera/Intel Quartus Prime design tools.
• Perform timing analysis, synthesis optimizations, and resource utilization improvements.
• Integrate, simulate, test, and debug FPGA designs in both pre‑silicon and lab environments.

Verification & Validation

• Create and execute testbenches and verification plans for module- and system-level functionality.
• Use simulation tools (ModelSim, QuestaSim) to validate RTL behavior.