About the Role
Job DescriptionJob Description:
Mediatek Egypt is seeking a skilled and motivated Digital Design to join our high-performance team focusing on SerDes and high-speed interface IP development. The successful candidate will be responsible for the architecture, RTL design, and integration of PHY IP blocks, collaborating with cross-functional teams to ensure high-quality and robust IP solutions for cutting-edge SoCs.
Key Responsibilities:
PHY IP Architecture Planning: Contribute to the architectural design of PHY IPs for high-speed interfaces such as Ethernet SerDes, USB, PCIe, HDMI, DisplayPort, MPHY, and CPHY.
RTL Design & Coding: Develop and implement RTL code for PHY IPs with a focus on performance, power efficiency, and silicon area optimization.
Front-end and Back-end Integration: Handle the integration of PHY IPs in both front-end and back-end design flows, ensuring seamless connectivity and function within the SoC.
Cross-functional ...
Mediatek Egypt is seeking a skilled and motivated Digital Design to join our high-performance team focusing on SerDes and high-speed interface IP development. The successful candidate will be responsible for the architecture, RTL design, and integration of PHY IP blocks, collaborating with cross-functional teams to ensure high-quality and robust IP solutions for cutting-edge SoCs.
Key Responsibilities:
PHY IP Architecture Planning: Contribute to the architectural design of PHY IPs for high-speed interfaces such as Ethernet SerDes, USB, PCIe, HDMI, DisplayPort, MPHY, and CPHY.
RTL Design & Coding: Develop and implement RTL code for PHY IPs with a focus on performance, power efficiency, and silicon area optimization.
Front-end and Back-end Integration: Handle the integration of PHY IPs in both front-end and back-end design flows, ensuring seamless connectivity and function within the SoC.
Cross-functional ...
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