About the Role
Senior DFT Engineer:
Experience : 7-10 years
Location : Hyderabad
specifically with expertise in , ATPG pattern generation, fault simulation, and coverage analysis
RTL coding (Verilog/SystemVerilog), test architecture, JTAG, MBIST/LBIST, and DFT.
Interested,please share your updated resume to
Ready to Apply?
Submit your application today and take the next step in your career journey with ACL Digital.
Apply Now