Full-time
Remote Verification Engineer — SystemVerilog/UVM Expert
Posted by Empiric • remoto, remoto, Spain
About the Role
A leading technology recruitment agency is seeking a Verification Engineer to work remotely for a manufacturing client in Europe. The successful candidate will possess strong experience with SystemVerilog and UVM, along with beneficial software experience in Python. This role emphasizes collaboration on various verification projects, making it suitable for engineers with experience in CHI, PCIe, or DDR. A competitive and supportive work environment is offered.
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