Principal Engineer, ASIC Development Engineering (IO and High‑Speed Design)

Principal Engineer will contribute to the design and development of IO and high‑speed interface solutions for next‑generation SoCs in advanced CMOS technology nodes.

• Participate in the design, and implementation of IO and high‑speed interface solutions for SanDisk ASIC controllers.
• Evaluate design approaches, implement blocks at the circuit and RTL levels as applicable, perform detailed analysis, and drive design closure with focus on quality and schedule.
• Collaborate with layout engineers by providing clear guidance, performing schematic‑layout reviews, and ensuring design robustness and layout quality.
• Support SOC integration activities, debug integration issues, and participate in post‑tapeout efforts including silicon characterization and performance validation.
• Provide technical guidance to junior engineers, support their ramp‑up, and contribute to fostering a culture of technical excellence.
• Contribute...