Physical Designer Engineer

Role Overview

We are seeking an adaptive, self‑motivated Physical Design Engineer to join our growing team. As a key contributor, you will help drive capabilities in delivering high‑performance, power‑efficient silicon solutions. The Physical Design team values continuous technical innovation and supports professional growth through challenging projects and collaborative success.

Key Responsibilities

• Full‑chip floorplanning, placement, clock tree synthesis (CTS), routing, timing closure, and physical verification
• Timing and SDC constraint generation and management; debugging skills are a plus
• Low‑power design methodologies, including power‑aware synthesis and place‑and‑route; voltage domain checks are advantageous
• Chip‑level floorplanning: feedthrough topology planning, repeater insertion, top‑level port/pin assignment
• Tapeout experience across multiple projects

Preferred Experience