About the Role
Hi all,
Modernize Chip Solutions is hiring for the below requirements.
Role: Physical Design Engineer
Notice Period: Immediate to 15 days
Location: BLR
Exp: 5+ yrs
Skills Required:
- Perform full chip or block-level physical design implementation from Netlist to GDSII
- Tools: Cadence Innovus / Synopsys ICC2, PrimeTime / Tempus, Calibre
- Strong knowledge of STA, SDC constraints
- TCL scripting (Python/Shell)
If Interested, please share your profile to my mail id
Ready to Apply?
Submit your application today and take the next step in your career journey with Modernize Chip Solutions (MCS).
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