Performance and Power (PnP) Modeling Engineer

We are seeking a skilled and motivated Performance and Power (PnP) Modeling Engineer to lead modeling, analysis, and optimization efforts across the full silicon development lifecycle. This role spans architectural modeling, RTL-level analysis, gate-level estimation, and post-silicon correlation. You will build infrastructure, analyze real workloads, identify inefficiencies, and collaborate across hardware and software teams to deliver high-performance and energy-efficient CPU designs.

Responsibilities

• Define and simulate key CPU workloads (boot, idle, burst, sustained) to identify architectural bottlenecks and drive data-backed design decisions.
• Construct tradeoff models and generate performance vs. power curves to support architectural optimization.
• Implement RTL-level power estimation flows using tools such as PowerPro, Joules, or RTLA.
• Analyze switching activity (VCD/SAIF), identify high-power hotspots, and drive RTL improvement...