full-time
Packaging Engineer (Substrate Design and Layout)
Posted by Sandisk • Taiwan, Taichung City, Taiwan
About the Role
Job Description
- Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products.
- Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and 2.5D. Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration.
- Conduct substrate layout feasibility studies, die fitment analysis, and prepare comprehensive design documentation.
- Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes.
- Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement.
- Interface with assembly houses and subs...
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