About the Role
Lead STA Engineer
Experience:
10+ Years
Location:
Bangalore
Job Summary:
We are looking for a highly skilled
STA Engineer
with 10+ years of experience in
timing analysis and closure for complex IP and SoC designs . The candidate will be responsible for driving
block-level and full-chip STA sign-off , handling cross-functional interactions, and delivering timing closure for high-performance designs.
Key Responsibilities:
Drive
end-to-end Static Timing Analysis
for block and SoC level designs.
Own
timing closure from synthesis to GDSII .
Perform
timing sign-off
including:
MCMM setup and analysis
OCV/AOCV/POCV
Crosstalk and noise analysis
SI-aware timing closure
Develop and validate
timing constraints (SDC) .
Analyze and fix
setup, hold, transition, and capacitance violations .
Work closely with
PD, synthesis...
Experience:
10+ Years
Location:
Bangalore
Job Summary:
We are looking for a highly skilled
STA Engineer
with 10+ years of experience in
timing analysis and closure for complex IP and SoC designs . The candidate will be responsible for driving
block-level and full-chip STA sign-off , handling cross-functional interactions, and delivering timing closure for high-performance designs.
Key Responsibilities:
Drive
end-to-end Static Timing Analysis
for block and SoC level designs.
Own
timing closure from synthesis to GDSII .
Perform
timing sign-off
including:
MCMM setup and analysis
OCV/AOCV/POCV
Crosstalk and noise analysis
SI-aware timing closure
Develop and validate
timing constraints (SDC) .
Analyze and fix
setup, hold, transition, and capacitance violations .
Work closely with
PD, synthesis...
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