Full time

Lead Application Engineer-Analog Design

Posted by Cadence Design Systems, Inc. • Yokohama, Kanagawa, Japan

📍 Yokohama, Kanagawa 🕒 March 01, 2026

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About the Role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Customer support/consulting based on Virtuoso platform, Cadence's A/MS IC design environment.
Main product：Virtuoso Schematic Editor (VSE), Spectre Circuit Simulator
Qualification Requirements
Majored in Electrical Engineering or some other equivalent
Has the knowledge and desire to take on new challenges
Experiences/Skills
At least 5 years of experience for A/MS IC circuit design and knowledge.
Having experiences of SPICE simulation / mixed-signal simulation.
Having experiences of signal integrity/power integrity analysis.
Having experiences of electromigration / IR drop analysis.
Having experiences of design rule/LVS(Layout vs Schematic)/parasitic extraction.
Having knowledge and experience of thermal analysis for IC design/PCB/package.
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Job Details

Location Yokohama, Kanagawa
Job Type Full time
Category Computer Occupations
Posted March 01, 2026
Deadline April 10, 2026

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