About the Role
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Job Description:
The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group.
In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells.
Requirements:
- Strong layout knowledge with a minimum of 2 to 3 years of experience
- Skills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools.
- Strong layout knowledge in submicron process, e.g. 16nm, 7nm, 5nm, 3nm,2nm etc
- Experienced in digital (standard cell, memory, I/O) layout
- Experienced in analog layout is also a plus
Job Description:
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