Full-time
Intern - Design Engineering
Posted by Cadence Design Systems, Inc. • Beijing, China, China
About the Role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Responsibilities:
+ Maintain the verification test bench and test template
+ Maintain the testing flows and regression framework
+ Define and manage verification/test plans
+ Create the reference models of DSP instructions and accelerators
+ Debug the DSP instruction and accelerator tests and collaborate with design engineers
+ Analyze the functional and code coverage
Job Qualifications:
+ Graduate student in CS/CE, EE, Telecom or equivalent
+ Strong knowledge of computer architecture
+ Proficiency in programming languages like C/C++, assembly, Verilog
+ Familiar with scripting languages like Perl, Makefile<...
Job Responsibilities:
+ Maintain the verification test bench and test template
+ Maintain the testing flows and regression framework
+ Define and manage verification/test plans
+ Create the reference models of DSP instructions and accelerators
+ Debug the DSP instruction and accelerator tests and collaborate with design engineers
+ Analyze the functional and code coverage
Job Qualifications:
+ Graduate student in CS/CE, EE, Telecom or equivalent
+ Strong knowledge of computer architecture
+ Proficiency in programming languages like C/C++, assembly, Verilog
+ Familiar with scripting languages like Perl, Makefile<...
Ready to Apply?
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