About the Role
Job Title: DV Engineer
Exeperience: 5-8Yrs
Work Location: Hyderabad
Job Description:
- Strong understanding the design and verification life cycle with 5 to 8 years’ experience
- Hands on verification experience with C/C++/System Verilog testbench development
- Hands on experience with coverage planning, coding, and coverage closure.
- Experience with x86, ARM or any other industry standard microprocessor ISA.
- Experience with Cache, Coherency and Data-Consistency verification.
- Experience in clocking, reset, power-up sequences and power management verification.
- Knowledge of microprocessor design-for-debug (DFD) logic will be a plus.
- Understanding of low power design verification techniques is a plus.
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