Engineer I

Job Summary:

Microchip AES Design team in Penang is looking for motivated Physical Design Engineers to implement RTL2GDSII for larger SOCs. As a member of Physical Design team, you will be responsible for place and route, timing closure and physical verification checks for multiple blocks and sub-systems.

Job Responsibilities:

The employee will be responsible for end-to-end Physical Design ownership of multiple large and complex sub-systems in advanced process nodes ranging from 16nm down to 3nm. The role demands strong technical ownership, problem-solving skills, and the ability to handle complex design and flow challenges independently.

Key responsibilities include:

• Complete Physical Design implementation including:

• Floorplanning

• Place & Route
• Clock Tree Synthesis (CTS)
• Timing closure using industry-standard tools such as Cadence Innovus and Synopsys ICC2.
• Drive PPA (Power, Perfo...