About the Role
Role : Emulation Engineer
Location : Hyderabad
Preferred : Immediate to 30 days
Experience : 4-5 yeats
- Experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu)
- Working knowledge of System Verilog & Verilog language semantics and compilation flows
- Solid understanding on SOC architecture and AXI protocol
- Good communication skills and team collaboration
Interested can apply below or share cvs to
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