Emulation Design Engineer
Posted by Cadence Design Systems, Inc. • Shanghai, Shanghai, China
About the Role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are seeking a highly skilled Emulation Design Engineer to drive the development of full-system design verification environments. This role focuses on developing and integrating and validating high speed interface [Serdes, Chip 2 chip link] based subsystems in Emulation Platforms. Development includes Parallel and Serial models for highspeed interface circuits in analog Mixed Signal Designs and components (PHYs). Integration includes the PHY, Controller / Mac and the Accelerable Verification IP (AVIP) environments on Palladium and Protium. End-to-end verification flow development across a wide range of system components including custom test case developments, validating the bare-metal-driver components in emulation platforms.
Key Responsibilities:
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