Full-time

Dft engineers

Posted by ACL Digital • Bengaluru, Karnataka, India

📍 Bengaluru, Karnataka 🕒 March 03, 2026

About the Role

DFT Engineer
Job Description:
- Scan insertion.
- SCAN DRC/Coverage debug.
- ATPG Pattern generation.
- Gate level simulations ( Zero delay/Timing Delay simulations).
- Worked on JTAG/P1500 protocols.
- Perl/Tcl scripting.
- Timing/Formal verification/PD flow knowledge is plus.
Location: Bangalore
Notice Period: Immediate
Experience: 4+ Years

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