Full-time

Design Verification Engineer/Lead

Posted by INVECAS • Guntur, Andhra Pradesh, India

📍 Guntur, Andhra Pradesh 🕒 March 01, 2026

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About the Role

 
  Experience 
 4-10 years
 
  Role and responsibility: 
 Strong Verification experience at Subsystem or SOC level
 Strong in System Verilog, Verilog, UVM, C/C++, Scripting
 Strong debugging skills, problem solving skills.
 Good attitude , good team player with strong interpersonal skills
 Power Management, Graphics Domain experience preferred
 Candidate must have low power verification experience in
 intel(ODC)/AMD(ODC) projects.
 
  Academic Qualification 
 BTech / Mtech Electrical/Electronics/Computers

Job Details

Location Guntur, Andhra Pradesh
Job Type Full-time
Category Engineers
Posted March 01, 2026
Deadline April 10, 2026

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