Full-time

Design Verification Engineer

Posted by ACL Digital • hyderabad, hyderabad, India

📍 hyderabad, hyderabad 🕒 March 01, 2026

About the Role

Experience: 2-3 Years

Location: Hyderabad

Education: B.E./B.Tech. in ECE/EEE or M.E./M.Tech. in VLSI/Electronics


Roles and Responsibilities


  • Strong expertise in UVM-based verification.
  • Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.


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