Regular Employee - Probation
Design Verification Engineer
Posted by Tessolve • Bristol, England, United Kingdom
About the Role
JOB DESCRIPTION
Title/Position: Verification SV/UVM for TC48x NVM
Location: EU/UK - The candidate is ideally based in Bristol, UK or Munich, Germany
If this is not possible then the candidate should be prepared for occasional on-site visits to
Bristol or Munich.
SL.NO: I2
Key Responsibilities:
1) Develop testbenches for a non-volatile memory IP
2) Creation of agents
3) Make adaptations to existing and create new tests for new features of the NVM IP
4) Show that the relevant tests are passing
5) Define verification coverage
6) Testbench Qualification using Certitude
7) Documentation of verification results
8) Proof that relevant tests are passing
9) Proof that verification coverage (structural and functional) is reached
10) Proof...
Ready to Apply?
Submit your application today and take the next step in your career journey with Tessolve.
Apply Now