Full-time
CMOS Test Structure Design & Layout Engineer
Posted by Micron Technology • tlaquepaque, jalisco, Mexico
About the Role
Micron Technology is seeking a qualified candidate for a role focused on memory cell-based test structure solutions. Responsibilities include supporting process development, verifying test structure documentation, and interpreting electrical DUT definitions. Applicants should possess a Master’s in engineering and experience with EDA tools, along with strong problem-solving skills. Successful candidates will work collaboratively, implementing solutions to monitor silicon health and assist in parametric validation. This role is part of an innovative team that drives the transformation of information into intelligence.
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