Full-time

ASIC RTL Design Engineer

Posted by eInfochips (An Arrow Company) • noida, uttar pradesh, India

📍 noida, uttar pradesh 🕒 June 07, 2026

About the Role

Position: ASIC RTL Design Engineer

Experience: 8+ Years

Location: Noida


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Key Responsibilities

  • Develop synthesizable RTL from micro-architecture specifications.
  • Design digital blocks such as control logic, datapath, and bus interfaces (AXI/AHB/APB).
  • Debug and validate RTL using simulation and waveform analysis.
  • Collaborate with verification teams for functional validation.
  • Support RTL synthesis, timing closure, and integration at SoC level.
  • Maintain design documentation.

Required Skills

  • Strong digital design fundamentals.
  • Experience in Verilog/SystemVerilog RTL c...

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