Full-time

ASIC RTL Design Engineer, ML Accelerators

Posted by Google • Sunnyvale, CA, United States

📍 Sunnyvale, CA 🕒 February 26, 2026

About the Role

ASIC RTL Design Engineer, ML Accelerators

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 2 years of experience with RTL design.
+ Experience with digital design, including synchronous and asynchronous logic, state machines, and bus protocols.
+ Experience in Verilog or SystemVerilog.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ 5 years of experience in silicon engineering.
+ Experience designing high speed digital designs.
+ Experience optimizing designs for...

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