Full-time

ASIC Design Verification Engineer

Posted by Cisco • Caesarea, Israel, Israel

📍 Caesarea, Israel 🕒 March 01, 2026

About the Role

**Meet the Team**

Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.

We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.

Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.



**Your Impact**



+ Review micro-architecture specifications

+ Implement Verification environment UVM based

+ Collaborate with Design engineers to resolve bugs and achieve coverage closure

+ Work with the firmware/Lab teams to verify chip flows

+ Perform debug, root-cause analysis, and post-silic...

Ready to Apply?

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