Part Time

ASIC Design Engineer

Posted by Chipright • Galway, Galway, Ireland

📍 Galway, Galway 🕒 March 01, 2026

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About the Role

Senior Digital Design Engineer We’re looking for a Senior ASIC Digital Design Engineer

Experience requiredRTL Design with system Verilog
Linting checks with spyglass
STA
Synthesis
Experience with formal verification would be a plus
Key QualificationsBS/MS degree with a minimum of 8 years of related experience.
Proficient in scripting languages (Python, Tcl Perl, unix shell)
Familiar with RTL best design practices with SystemVerilog
Familiar with implementation and verification front end flows
Strong communication skills

Job Details

Location Galway, Galway
Job Type Part Time
Category Engineers
Posted March 01, 2026
Deadline April 10, 2026

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