About the Role
Senior Analog IC Layout Engineer Experienced analog IC layout, Coarse geometry, 0.35um CMOS Experience in Cadence tools , ASSURA DRC LVS , PVS DRC LVS, and QRC Experience in Mentor Calibre Tools DRC LVS and Parasitic Extraction
Ready to Apply?
Submit your application today and take the next step in your career journey with Chipright.
Apply Now