Full-time

AI/ML ASIC Design Verification (Formal) Engineer

Posted by Qualcomm • Markham, York Region, Canada

📍 Markham, York Region 🕒 March 01, 2026

About the Role

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

QUALCOMM is the world's leading developer of next‑generation wireless and multimedia technology.

We are seeking an ASIC Design Verification engineer to help build world‑class AI/ML hardware IP for upcoming compute and multimedia products. The ideal candidate has experience in formal verification (FPV/DPV) or assertion‑based verification, but strong candidates with functional verification background (UVM/SystemVerilog) and an interest in growing their skills in formal methodology are also encouraged to apply. This role offers an excellent opportunity to contribute to cutting‑edge ML hardware while developing expertise across both formal and simulation‑based verification flo

Responsibilities:

  • Collaborate closely with RTL design, architecture, and verification...

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